Engineering curriculum materials
Siemens Digital Industries Software provides free classroom-ready curricular materials for educators. Developed cooperatively by professors at partner universities and Siemens technical experts, these teaching materials can be implemented as-is or integrated with your syllabus.
Free classroom curriculum downloads
Design & verify 5G systems, Part 2
With Veloce X-STEP, partners can exchange fronthaul test configurations in an executable format to enable ecosystem-wide cooperation, thorough verification, and interoperability between devices from different vendors.
Veloce X-STEP O-RAN
With its unique O-RAN test capabilities, Veloce X-STEP ensures accurate protocol implementation and packet timings and, as a result, full interoperability between Fronthaul devices.
Catapult High-Level Synthesis and Verification Fact Sheet
Industry leading C++/SystemC High-Level Synthesis with Low-Power estimation/optimization. Design checking, code and functional coverage verification plus formal make HLS more than mere “C to RTL.
Questa Verification Solution
The Questa verification solution is an assemblage of technologies, methodologies, and libraries for modern ASIC and FPGA designs. Questa continues to evolve in response to the growing complexity of SoC designs.